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 SPV Basic environment content::

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The basic SPV library enable build your simple verification environment and it includes the following general classes.

  • Generation classes.

    • Create values-dependent constraints.

    • Creation of structures, dependent on constraints and connections between different fields (package).

  • Coverage classes:​

    • Coverage declaration:​

      • Cross and single coverage.​

      • Coverage items declaration.

      • Coverage deriving verification, enable achieve 100% coverage and 100% efficiency.

  • Bits Manipulation:​

    • class SpvBitVec​ :

      • behave like integer {unlimited size).

      • All mathematical operation. ​

      • A data structure similar to the 'PLI' interface {Used for quick information transfer between the environment and the simulator }

      • Used for generating random numbers and values, creating packages for communication protocols, and any manipulation of bits.

  • MATLAb Runtime integration.

    • enable call any 'm' file with 'ENG' open mode (MATLAB with GUI).​

    • Enable call  any MATLAB  function by using MCC compiler.

    • SPV supply classes to deal  with any MATLAB data structure like:

      • Struct.​

      • Elements (List)

      • DoubleArray (Complex and not complex).

      • Cell.

      • strings.

      • MatFile.

      • Struct walker.

      • other

    • SPV loads one DLL per project, all the objects created are in the same running process.​

    • Using DPF to deal with MATLAB make it.

      • Faster (Performance 10X  VS files).​

      • Easy of use.

      • enable connect any information from MATLAB to HDL, from HDL to MATLAB.

    • More ...

  • SPV Scheduler and simulator interface.​

    • Read/Write access to any element in VHDL/Verilog​. 

    • Event driven:

      • SPV enable wait to any HDL event like:​

        • Posedge, Negedge, Change, =<>!= value of any signal in design.​

      • Wait time.​

    • Read/Write slice,  'X', 'Z' , bin and mix.​

    • Deal with any signal size.

    • TCM that behave like thread,  with Wait  events in loop or not.

    • Example:

 

 

 

Read more in programmer guide

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More topics.

 

SPV's Key Advantages:

  • Performance - High speed (5X compared to other verification tools)

  • Standard C++ language –

    • Modular and reusable code.

    • Wide range of tools and libraries available.

    • Low cost and fast development for new features

    • A lot of professional engineers in C ++

  • Platform - LINUX, UNIX & WINDOWS

    • The Only complete solution for functional verification in Windows.

    • Excellent verification frame work for editing, compiling, linking and debugging.

  • Full Integration with HDL Simulators.

  • Especially Suitable for FPGA Development.

  • Plug & play – Low cost introduction and assimilation.

  • Support for Mixed VHDL / Verilog Verification.

  • MATLAB integration.

  • Pre-Silicon software validation.

  • More ...

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    // Launch the TCM (Behave like thread).

    StartTProc(ExmClass,DriveData);

  void   ExmClass::DriveData()

  {

      SpvEvent clkPos("top.clk",AtPos);//Create event object

      SpvSig     sigReady("top.ready");//Connect to signal ready

      SpvSig     sigData("top.data");//Connect to signal  data

      Wait(clkPos,10);//Wait 10 posedge

      Wait(clkPos);  //wait 1 clock.

      while (sigReady !- 1) {

      // More  efficiency - SpvEvent ReadyPos("top.ready",AtPos);  Wait(ReadyPos);

          Wait(clkPos);

      }

     for (unsigned i=0;i<100;i++) {

         sigData  = GenUnsigned(0,0xFFFF);

         Wait(clkPos);

     }

     Wait(MonitorFinish);

    StopSim();

  }

SPV Test-bench Studio, represents a further step forward in verification technology. It is a software environment, integrated with RTL hardware simulation environment.SPV integrates with VHDL/Verilog/Mix for Linux/Windows, designed for writing verification test suites.

SPV is a verification environment, which takes the advantages of the strongest tools and languages, imports them, in order to help building rich and faster verification environment.    

SPV enable write mix languages, C++, C, Python and MATLAB for writing verification code. 

 

Tools:

  • Verification frame work for editing, compiling, linking and debugging.

    • Visual studio for windows.

    • Eclipse for Linux

    • MATLAB become to be C interface by using MCC compiler, and DPF os SimPlus.

  • Advantages:​

    • The most powerful and flexible editing tools, that enable the same environment to compile link and debug the code.

    • GUI environment for testing process:

      • Change test parametrs, Generators, clocks, Boolean, numbers (float, double, Uint, Int, Long vectoor), and even creating processes that drive and check the design by mouse click only.

    • C ++ is a language that is supported and developed by millions of engineers worldwide, providing detailed documentation, examples and explanations of what a user might think. These engineers have developed the language to be the most rich, providing a solution to every problem. Many libraries for almost any purpose, and an open and rich language that allows the final developer to do whatever he likes, using the best tools for developing, running and debugging.

    • Standard - C ++ is the most stable and standard language. Old C code (30 years ago),  works excelent, with the newest methods available today, platforms and environment 

    • the most of the abilities no cost.

SPV_ADVANTAGES
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